MDGen for SystemC

Link your system specifications and requirements to your hardware designs


Developers who need to access third-party application data


Create Java applications which read and write external data


Any industry where accessing third-party data is needed

Leverage Rhapsody to generate hardware specifications from your SysML models.

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SysML Synthesis to System

SysML in Rhapsody is untimed and sequential, so how does MDGen for SystemC generate cycle accurate, concurrent descriptions in SystemC?

MDGen for SystemC bridges the execution semantics by its sophisticated synthesis engine. MDGen for SystemC’s technology coordinates the parallel execution and guarantees preservation of transaction order, something that a naïve translation cannot. SysML structure is mapped to SystemC modules, state machine behavior is mapped to SystemC component structures, and AND-state concurrency is mapped to multiple SystemC processes within a block. Also, timing and hardware specific artifacts such as lock/reset lines are generated automatically.


Hardware/Software Workflow

In the system workflow at left, requirements are captured in DOORS, then imported into Rhapsody. Rhapsody can automatically generate software, but not hardware descriptions. The hardware models are needed to work with tools for architectural analysis/optimization, hardware implementation and software simulation and validation. MDGen for SystemC addresses this automation gap in the flow.

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